1. Field of the Invention
The invention relates in general to a testing system for testing a device, and more particular to a testing system with a switching module for testing a device.
2. Description of the Prior Art
A device such as IC (Integrated Circuit) is required to be fully tested before it can be released to the market. Nowadays, IC has become more and more complicated with ever increasing running speed. As a result, how to test an IC to ensure it is fully functioning is an important task, especially for high speed and high pin-count devices.
For a high pin-count IC, it is preferred to use a solid state switching module instead of using relays to select any pins out of all the pins of an IC for testing, because the size of the solid state switching module can be made much smaller compared with conventional relays. However, in solid state switching module, it is easier to conduct current from the switching module back to the DUT (Device Under Test) or the tester, which will affect the correctness of the testing results.
For example, FIG. 1 illustrates a conventional testing system, which includes a DUT 100, a switching module 101 and a tester 102. The DUT 100, the switching module 101 and the tester 102 are grounded together. The DUT 100 has a plurality of I/O pins. The switching module 101 comprises a conductive path 103 to conduct a first pin out of the plurality of I/O pins to a second pin of the switching module. The tester is connected to the conductive path 103. An open/short test is performed by forcing current from the conductive path 103 to the tester 102. In such conventional testing system, there may be a current path 104 that allows a current ISW (110) flowing from the ground of the switching module to the second pin in the switching module. As a consequence, a current seen by the tester ITESTER (120) is the sum of ISW (110) and current loop IDUT (130) through the conductive path 103, which can be shown in the following equation:ITESTER−IDUT+ISW,
Wherein the IDUT (130) is what a designer cares about and the ISW (110) shall not exist in the open/short test in the first place; otherwise, a pseudo pass will occur in the open/short test because the current flowing from the switching module back to the tester will reduce the current from the DUT back to the tester, which will cause the test to fail.
Furthermore, some unwanted current flowing from the switching modules to the DUT or the tester may take different ways. For instance, in a solid state high speed switching module, parasitic inductance or capacitance may contribute current flowing between the switching module and the DUT or tester due to sudden current changes if all the grounds of the DUT, switching module, and the tester are tied together.
Therefore, what is needed is a solution to perform tests on a DUT to resolve the pseudo pass issue.